1. Field of the Invention
The present invention relates to an analog/digital converter contained in a one-chip microcomputer and having a self-test function, and more particularly to a test device of an analog/digital converter capable of verifying all failures in a digital part of the analog/digital converter by testing the digital part at a function test step.
2. Description of the Prior Art
Referring to FIG. 1, there is illustrated a conventional test device of an analog/digital converter (A/D converter). As shown in FIG. 1, the test device comprises an analog input select register 1 for storing analog input select data received from a microcomputer via an internal data bus 9 therein, a multiplexer 2 for selecting one of analog input terminals AIN1 to AIN4 on the basis of output data from the select register 1, and a comparator 6 for comparing a selected analog input signal from the multiplexer 2 with a reference signal Vref. The test device also comprises an A/D conversion period register 3 for storing A/D conversion period test data received from the microcomputer via the internal data bus 9 therein. A control logic 4 is also provided for outputting A/D conversion reference data for generating the reference signal Vref and an A/D conversion period signal controlling enabling of the comparator 6, on the basis of the A/D conversion period test data stored in the A/D conversion period register 3. The control logic 4 also functions to convert an output voltage from the comparator 6 into digital data and output it as resultant data. The test device further comprises a D/A converter 7 for converting A/D conversion reference data outputted from the control logic 4 into analog voltage, for each completion of one-bit conversion and supplying each analog voltage to the comparator 6 as the reference voltage Vref, an A/D conversion result register 5 for storing 8-bit digital data outputted sequentially from the control logic 4, and an interrupt generator 8 for generating an interrupt signal upon outputting of A/D conversion data of 8 bits from the control logic 4.
In such a conventional test device, analog input select data inputted from the microcomputer via the internal data bus 9 sequentially stored in the analog input select register 1, as shown in FIG. 1. On the basis of the analog input select data stored in the analog input select register 1, the multiplexer 2 selects one of analog input terminals AIN1 to AIN4 to receive an analog input signal. Analog input signal received in the multiplexer 2 via the selected analog input terminal is applied to the comparator 6 and compared with the reference voltage Vref therein. Resultant signal from the comparator 6 is applied to the control logic 4.
On the other hand, the A/D conversion period select register 3 stores A/D conversion period test data received via the internal data bus 9 from the microcomputer, therein. On the basis of the A/D conversion period test data stored in the A/D conversion period register 3, the control logic 4 generates A/D conversion reference data for generating the reference signal Vref and an A/D conversion period signal controlling enabling of the comparator 6. By the D/A converter 7, A/D conversion reference data outputted from the control logic 4 for each completion of one-bit conversion is converted into an analog voltage which is, in turns, applied to the comparator 6 as the reference voltage Vref.
Accordingly, the comparator 6 compares the analog input signal selected by the multiplexer 2 with the reference voltage Vref and supplies a resultant binary signal to the control logic 4. The binary signal is converted into digital data in the control logic 4 and stored in the A/D conversion result register 5. As such a procedure is repeated 8 times, 8-bit data conversion is completed. Accordingly, 8-bit data from a most significant bit (MSB) to a least significant bit (LSB) is stored in a sequential manner.
Subsequently, the interrupt generator 8 generates an interrupt signal representative of completion of data conversion for 8-bit data from the most significant bit (MSB) to the least significant bit (LSB). At this time, the microcomputer reads the 8-bit data stored in the A/D conversion result register 5 via the internal data bus 9 and verifies analog/digital conversion logic.
However, since the A/D converter contained in microcomputer is a system comprising mixed analog and digital parts requiring a long test time, the conventional test device has a problem of disablement of a lot of logics at a function test step during the entire testing procedure of the microcomputer.
That is, it is impossible to test the comparator 6, a part of the control logic 4, the A/D conversion result register 5 and the D/A converter 7. As a result, it is difficult to verify the defects in the A/D converter contained in the microcomputer in the function test step. Verification for defects in the A/D converter is possible only in an accuracy test step, which requires a long test time and an expensive test cost.